Last update: 2019/04/05 15:35

[Japanese]

[Purpose] [Policy] [Basic Architecture] [Characteristic] [Realizing] [Development status] [List of Publications] [Staffs] [Manual]
[Purpose]

Construction of a study base helping technical establishment of a function and the structure that are necessary for the future operating system.


[Policy]

[Basic Architecture]

[Characteristic]

[Realizing]
  1. Regulating execution speed [8], [9], [10], [18]
  2. Process execution control mechanism considering processing of running processes
  3. Using virtual space to processing content [13]
  4. Speedup of creation and deletion of resources [12], [17], [19]
  5. Enduring processing and resources
  6. Operation of remote resources
  7. Exchaning parts of executed program
  8. Simplify comprehension of OS behavior [25], [27]
  9. Optimized distribution of processes

[Development status (Last 3 years)] [All]
April, 1995 Examination start
December, 2015Tender Ver.21.0
March, 2016 Tender Ver.21.1
December, 2016 Tender Ver.22.0
December, 2017 Tender Ver.23.0
March, 2018 Tender Ver.23.1
December, 2018 Tender Ver.24.0
March, 2019 Tender Ver.24.1

[List of Publications]
  1. "Overview of Tender,"
    IPSJ Computer System Symposium, IPSJ Symposium Series, Vol.95, No.7, pp.47-54 (1995). (in Japanese)
  2. "Implementation and Evaluation of Process Execution Mechanism on Tender,"
    IPSJ Computer System Symposium, IPSJ Symposium Series, Vol.98, No.15, pp.87-94 (1998). (in Japanese)
  3. "Implementation and Evaluation of Speed Control Mechanism of Program Execution on Resource Execution on Tender,"
    Transactions of Information Processing Society of Japan, Vol.40, No.6, pp.2523-2533 (1999). (in Japanese)
  4. "Guarantee of Service Processing Time by execution on Tender,"
    IPSJ Computer System Symposium, IPSJ Symposium Series, Vol.99, No.16, pp.33-40 (1999). (in Japanese)
  5. "Implementation and Evaluation of Distributed Shared Memory on Tender,"
    IPSJ Computer System Symposium, IPSJ Symposium Series, Vol.99, No.16, pp.161-168 (1999). (in Japanese)
  6. "Guarantee of Service Processing Time by Execution on Tender Operating System,"
    IPSJ Journal, Vol.41, No.6, pp.1745-1754 (2000). (in Japanese)
  7. "Tender Operating System based on Mechanism of Resource Independence,"
    IPSJ Journal, Vol.41, No.12, pp.3363-3374 (2000). (in Japanese)
  8. "Implementation and Evaluation of Multiple Processes Control Mechanism for Regulating Program Execution Speed,"
    Proc. of International Symposium on Principles of Software Evolution (ISPSE 2000), pp.315-319 (2000).
  9. "Guarantee of Service Processing Time of Process Group for Multimedia Application,"
    Proc. of Pan-Yellow-Sea International Workshop on Information Technologies for Network Era (PYIWIT'02), pp.104-111 (2002).
  10. "Evaluation of Communication Bandwidth Control Mechanism by Regulating Program Execution Speed,"
    Proc. of 7th IASTED International Conference on Internet and Multimedia Systems and Applications (IMSA 2003), pp.14-19 (8, 2003).
  11. "A Mechanism of Regulating Execution Performance for Process Group by Execution Resource on Tender Operating System,"
    IEICE Transactions on Information and Systems, Vol.J87-D-I, No.11, pp.961-974 (2004). (in Japanese)
  12. "A Resource Management Method for Improving Recycling Ratio in Recycling Process Elements,"
    Proc. of The 8th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI 2004), Vol.V, pp.203-208 (7, 2004).
  13. "Proposal and Implementation of Heterogeneous Virtual Storage Coexisted of Single Virtual Storage and Multiple Virtual Storage,"
    Proc. of International Conference on Computing, Communications and Control Technologies (CCCT 2004), Vol.I, pp.415-420 (8, 2004).
  14. "An Abuse Prevention Technique of CPU Time by Using Execution Resource,"
    PreProc. of the 6th International Workshop on Information Security Applications (WISA2005), pp.413-420 (8, 2005).
  15. "Controlling CPU Usage for Processes with Execution Resource for Mitigating CPU DoS Attack,"
    Proc. of 2007 International Conference on Multimedia and Ubiquitous Engineering (MUE 2007) (The 2007 International Workshop on Interactive Multimedia & Intelligent Services in Mobile and Ubiquitous Computing 2007 (IMIS2007)), pp.141-146, (4, 2007).
  16. "A CPU Usage Control Mechanism for Processes with Execution Resource for Mitigating CPU DoS Attack,"
    International Journal of Smart Home (IJSH), Vol.1, No.2, pp. 109-128 (7, 2007).
  17. "A Recyclable Resource Management Method for Fast Process Creation and Reduced Memory Consumption,"
    Proceedings of the 2007 International Conference on Intelligent Pervasive Computing IPC-07, pp.194-199, (10, 2007).
  18. "A Mechanism of Regulating Execution Performance for Process Group by Execution Resource on Tender Operating System,"
    Systems and Computers in Japan, Vol. 38, No. 4, pp.63-78, (12, 2007).
  19. "An Improved Recyclable Resource Management Method for Fast Process Creation and Reduced Memory Consumption,"
    International Journal of Hybrid Information Technology (IJHIT), Vol.1, No.1, pp.31-44, (1, 2008).
  20. "Proposal of Instant Synchronous Interprocess Communication,"
    Proc. of the third International Conference on Convergence and hybrid Information Technology (ICCIT2008), pp.146-149 (11, 2008).
  21. "Realization and Evaluation of High Speed fork & exec System-call by Recycling Resource on Tender,"
    IEICE Transactions on Information and Systems, Vol.J91-D, No.12, pp.2892-2303 (12, 2008). (in Japanese)
  22. "Implementation and Evaluation of Heterogeneous Virtual Storage (HVS) on Tender Operating System,"
    IEICE Transactions on Information and Systems, Vol.J92-D, No.1, pp.12-24 (1, 2009). (in Japanese)
  23. "ISIPC: Instant Synchronous Interprocess Communication,"
    Journal of Next Generation Information Technology, vol.1, no.3, pp.75-83, (11, 2010).
  24. "A Mechanism that Bounds Execution Performance for Process Group for Mitigating CPU Abuse,"
    2010 International Conference on Security Technology (SecTech2010), Communications in Computer and Information Science (CCIS), Vol.122, pp.84-93 (12, 2010).
  25. "Design of an OS Architecture that Simplifies Understanding of Operating System Behavior,"
    Proceedings of 2012 International Conference on Information Technology and Computer Science (ITCS 2012), pp.51-58, (7, 2012).
  26. "A mechanism for achieving a bound on execution performance of process group to limit CPU abuse,"
    The Journal of Supercomputing, Vol.65, Issue 1, pp.38-60, (7, 2013).
  27. "Implementation of the Localized Exclusive Control for Multi-core Tender,"
    IPSJ Computer System Symposium (ComSys2013), IPSJ Symposium Series, Vol.2013, pp.14-23, (12, 2013). (in Japanese)
  28. "A New OS Structure for Simplifying Understanding of Operating System Behavior,"
    INFORMATION-An International Interdisciplinary Journal, Vol.17, No.5, pp.1945-1950, (5, 2014).
  29. "Implementation of Multi-core Tender with Mutual Exclusion Localization Based on Mechanism of Resource Independence,"
    IPSJ Transactions on Advanced Computing System (ACS), Vol.7, no.3, pp.25-36, (8, 2014). (in Japanese)
  30. "Plate: Persistent Memory Management for Nonvolatile Main Memory,"
    31st ACM Symposium on Applied Computing (SAC 2016), (4, 2016).

[Staffs]

[Manual]
Taniguchi Lab.
Yamauchi Lab.